As you develop complex signal processing algorithms and systems, how do you verify that your design works as intended in context with the entire system? Do you find that you are spending more time on testing than on developing algorithm IP for your products?
This webinar is the first of a three-part series that demonstrates techniques for reducing verification time by eliminating design flaws earlier in your development process. This webinar focuses on modeling and simulation, and upcoming webinars will describe techniques for accelerating verification of HDL and embedded C code.
This webinar will describe approaches for modeling systems with complex timing, control logic, and analog and digital system components. As an example, it will provide an in-depth demonstration of a digital pre-distortion DSP techniques to compensate for nonlinear RF components in a wireless base station. The demonstration will cover:
• Fixed-point DSP algorithm development
• RF behavioral modeling
• Test Bench creation
• BER simulation and analysis
No prior knowledge of MATLAB or Simulink is required for this webinar.
Recorded: 25 mar 2009